11/17/2021 (Wed) 12:16:49
It's a step in the right direction, but you're still limited to the foundries. The foundries will know that the chips are going to be RISCV CPUs and can tweak them. The only way I can see to avoid the issue is to use FPGAs, since the foundry will not know the end use. Cost will become an issue, if attempting to use large FPGAs for CPUs.
Oldschool boomers have talked of this, watching as more and more integration led to obfuscated construction. What used to be daughter boards and discrete components, became small black ICs, and then those became fewer and fewer. Now there are SoC and things like Apple M1, the momentum is obvious. Intel moving what used to be the North Bridge into the actual CPU, this is also when Intel introduced the Management Engine.